There are a number of applications where it may be desirable to grow a strained semiconductor layer. For example, strained silicon layers are routinely used in high performance complementary metal oxide semiconductor (CMOS) devices because strained semiconductor layers may exhibit higher carrier mobility, and hence transistors having channels formed in such strained silicon layers may exhibit higher switching speeds. A strained silicon layer may be formed, for example, by growing a relatively thin silicon layer on a thicker silicon-germanium layer that is often referred to as a silicon-germanium “buffer” layer.
FIG. 1 illustrates a strained silicon layer formed according to a conventional technique. Referring to FIG. 1, pursuant to this conventional technique, a graded silicon-germanium (Si1-xGex) layer 20 is epitaxially grown on a bulk silicon substrate 10. The value of x may be very low (or zero) at the interface between the graded Si1-xGex layer 20 and the bulk silicon substrate 10, and x may increase with increasing distance from the substrate 10. Because of the lattice-mismatch between the silicon substrate 10 and the graded Si1-xGex layer 20, the Si1-xGex layer 20 may be under strain as grown. After the graded Si1-xGex layer 20 is grown beyond a certain thickness, misfit dislocations 22 may be generated at the interface between the bulk silicon substrate 10 and the graded Si1-xGex layer 20. A pair of threading dislocations 24 may extend from each misfit dislocation 22 up through the graded Si1-xGex layer 20 toward the surface of the graded Si1-xGex layer 20. Techniques may be used during growth that tend to increase the length of the misfit dislocations 22, which may help limit the number of threading dislocations 24 that are formed. The formation of these dislocations 22, 24 may act to relax the graded Si1-xGex layer 20. The graded Si1-xGex layer 20 may then be further relaxed by a thermal anneal.
A silicon layer 30 may then be grown on the graded Si1-xGex layer 20. Because of lattice mismatch between the relaxed, graded Si1-xGex layer 20 and the silicon layer 30, the silicon layer 30 may be under strain as grown. Unfortunately, however, threading dislocations 24 that reach the upper surface of the graded Si1-xGex layer 20 may cause dislocations or other defects in the strained silicon layer 30. These defects/dislocations 24 in the strained silicon layer 30 may negatively affect the performance of any semiconductor device formed in the silicon layer 30. While the threading dislocation density at the top surface of the graded Si1-xGex layer 20 may generally be decreased by increasing the thickness of the graded Si1-xGex layer 20, the growth of thicker Si1-xGex layer 20 may significantly increases the required growth time and may also result in other problems such as, for example, an increased incidence of semiconductor wafers becoming unusable due to particles that fall into the wafer during epitaxial growth. Moreover, to reduce threading dislocation levels to 1×106/cm2 or less, it may be necessary to grow the graded Si1-xGex layer 20 to a thickness of tens or hundreds of microns. The growth times and material costs associated with the growth of such thick layers may be prohibitively expensive in many applications.
In another approach, strain-relaxed Si1-xGex layers have been formed by growing Si1-xGex layers on a silicon-on-insulator substrates. Prior to the growth of such an Si1-xGex layer, the silicon-on-insulator substrate is etched or subject to a grinding operation so that only a 50 nm thick silicon layer remains on the insulator of the silicon-on-insulator substrate. After the layer is grown, it is then relaxed via a thermal annealing process. However, this process requires a more expensive silicon-on-insulator substrate and has only been shown to work with relatively low germanium concentration Si1-xGex layers (i.e., x=0.15).